QRA - SIL Verification
IEC 61511 and ANSI/ISA S84.01-2004 require a quantitative verification of the SIL of each SIF to meet the target SIL determined in the SRS. PCS consultants utilize FTA (Fault Tree Analysis) modeling for the SIL (Safety Integrity Level) quantified verification. The main benefits of this technique include:
- A clear graphical representation of the system.
- Mathematical models for numerous modes of operation (i.e., repairable, non-repairable, and stand-by).
- Results directly indicate key contributors to system unavailability.
- Consideration of sensitivity cases for modifications to system components, architecture, and component testing intervals.
- Easy conversion of system model for evaluation of spurious trip rates.
The resulting PFDavg calculation for each SIF is referenced to the SIL number and compared with the target SIL determined in the SRS. This constitutes the quantified SIL verification process for the fail to function or Safety Availability.
A second Fault Tree is constructed to verify the MTTFspurious. The computed result is compared with the maximum spurious trip rate established in the SRS. This constitutes the quantified verification of the spurious trip rate.
PCS consultants utilize tool-sets, such as SAPHIRE® and SILcalc™ to facilitate iterations in the FTA, conducive to optimization of the proof testing intervals and overall SIS design with a good balance of safety and reliability.